Jonathan Brown Jonathan Brown

How I Built a Complete Travel Planner App This Weekend Using ChatGPT 5.5 (No Coding Required)

Over the last few days I put ChatGPT 5.5 and Codex to the test in a serious way. I started vibe coding on Monday and finished today (Thursday April 27th). Roughly 10 hours total time invested — and at least half of that time was spent testing features thoroughly. The 1st hour was spent doing it wrong then I started over. The last hour was figuring out how to setup GitHub to load it there. This wasn’t casual weekend tinkering; it was focused, deliberate work.

The result is a fully functional, mobile-first Travel Log app that I’m actually going to use for my upcoming trip. It’s live right now at travel.jdb.net.

What I Built

A clean, self-contained travel itinerary manager with:

  • Trips grouped by name and automatically sorted by earliest event

  • Events sorted chronologically inside each trip

  • Compact one-line display (date • time • bold location • description)

  • Full add / edit / delete for events and trip names

  • Instant search across every field

  • “Not booked” items automatically highlighted in red

  • Import from pasted text or file (with review step before committing)

  • Export clean text itineraries that can be re-imported

  • One-click PDF export (print-optimized, page breaks between trips, events kept together)

  • Reload the built-in 2027 sample itinerary anytime

  • 100% localStorage — no account, no server, works offline (if installed offline).

It currently ships with two incomplete sample trips: an Alaska cruise and a 17-event Spain itinerary.

Security: Everything persists in the browser and feels native on mobile. No data lives on the cloud only on your computer if you want to try it out. That said, I have made only minimal security evaluations of this app and it’s intended for demonstration purposes only. Use it with real data at your own risk. I’m using a local copy of the app for my real trip data.

How I Built It (Vibe Coding in Practice)

I followed the exact workflow I learned in the Generative AI Bootcamp:

  1. Wrote a clear PRD (Product Requirements Document) first

  2. Used ChatGPT 5.5 and Codex to generate the initial structure

  3. Iterated with precise follow-up prompts: “Make the search instant across all fields”, “Add typed-name confirmation before deleting a trip”, “Highlight ‘not booked’ in red”, “Generate a clean PDF export with proper page breaks”

  4. Tested every single flow repeatedly — adding events, importing notes, exporting PDFs, checking mobile layout, edge cases, etc.

The 5-hour testing investment paid off. The app feels solid because I caught and fixed dozens of small issues before they ever reached the live site.

Why This Matters

  • If you’ve ever wanted a custom internal tool, client portal, lead tracker, or operational dashboard but didn’t have the budget or timeline for traditional development, this approach is now genuinely viable.

  • You can go from idea to working, usable prototype in a single focused day (or a few evenings). The remaining polish still benefits from human oversight, but the barrier has dropped dramatically.

  • I’m not claiming this replaces professional developers. I am saying the cost and speed of testing new ideas has improved by an order of magnitude. I do have programming experience and I used that to direct the AI, but at no time did I write or look at any code.

What’s Next

I’m already thinking about the next small tool I want to build the same way. The pattern is addictive once you experience it.

If you’re a business owner or operator sitting on an app idea because “we don’t have developers” or “it would take too long,” let’s talk.

I’m now helping companies build AI-generated apps and internal tools using ChatGPT 5.5, Codex, and the same vibe-coding process. We start with a clear requirements document, deliver a working prototype quickly, and iterate until it fits your actual workflow.

Reach out if you want to explore what’s possible for your business. No hard sell — just a practical conversation about whether this makes sense for what you’re trying to solve.

The 10-hour experiment is complete. Turning these capabilities into real business advantage is where the interesting work begins.

Travel Log — because good trips deserve good records, and good records shouldn’t require a complicated app.

Live demo: https://travel.jdb.net

What kind of internal tool or app would you build first if the technical hurdles were this low? THEY ARE! Send me comments here: I read every comment.

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Jonathan Brown Jonathan Brown

Ultimate Guide to AI Inference Chips as of February 2026: Top Picks and Emerging Tech

As we dive deeper into 2026, the AI landscape is evolving rapidly, with inference—the process of running trained AI models in real-world applications—taking center stage. While training massive models once dominated chip design, the focus has shifted to efficient, low-latency inference for everything from edge devices to hyperscale data centers. This pivot is driven by exploding demand for agentic AI, on-device processing, and cost-effective scaling. According to industry forecasts, AI chips could account for nearly half of the $975 billion global semiconductor market this year, with inference workloads leading the charge.

Innovations like custom ASICs, wafer-scale engines, and programmable accelerators are pushing boundaries, promising orders-of-magnitude improvements in speed, power efficiency, and cost. Below, I've curated the top 5 state-of-the-art solutions based on performance metrics, market adoption, and upcoming releases. This list prioritizes chips optimized for inference, drawing from recent announcements and benchmarks. Note that "best" here emphasizes throughput (e.g., tokens per second), energy efficiency, and scalability for generative AI tasks.

1. NVIDIA Rubin GPU

NVIDIA continues to dominate with its Rubin platform, unveiled at CES 2026 and slated for H2 2026 release. The Rubin GPU features a third-generation Transformer Engine with adaptive compression, delivering 50 petaflops of NVFP4 compute—tailored for inference in always-on AI factories. In configurations like the NVL72 rack, it achieves up to 3.6 exaflops of FP4 inference performance, a 3.3x leap over Blackwell. Meta's massive deal for Rubin systems, including standalone Grace CPUs for inference, underscores its enterprise appeal. For edge use, the DGX Spark desktop variant offers 1 petaflop with 128GB unified memory, enabling local runs of 200B-parameter models. Rubin's codesign slashes inference token costs by up to 10x, making it ideal for hyperscalers.

2. Taalas Hardcore HC1

Fresh off a $169M funding round in February 2026, Taalas's HC1 chip hardwires entire AI models directly into silicon, ditching traditional GPUs for "insane" performance. Benchmarks show it running Llama 8B at 17,000 tokens per second—10x faster than Cerebras's wafer-scale engine and 20x cheaper than NVIDIA's B200. No HBM or liquid cooling needed; it's a specialized ASIC that can be taped out in two months for new models. This approach ensures deterministic, low-latency inference, perfect for robotics and edge AI where cloud dependency is a liability. Early testers call it a game-changer for autonomous systems, though its model-specific design limits flexibility.

3. Cerebras Wafer-Scale Engine (WSE-3)

Cerebras's third-gen WSE-3, already shipping in 2026, redefines scale with its massive wafer-sized chip boasting 900,000 cores and 44GB on-chip SRAM. Optimized for inference, it handles trillion-parameter models without sharding, delivering revolutionary throughput for distributed workloads. In 2026 predictions, it's poised to capture 5% of the inference market by offering 10x speed at 1/10th the cost of NVIDIA H200s. Its rating of 4.7 in efficiency benchmarks highlights power savings for data centers. While not as programmable as GPUs, its "AI appliance" ethos ends the era of waiting for models to "think," enabling real-time code generation at human speeds.

4. AMD Instinct MI400 Series

AMD's MI400 "Helios," launching in 2026, builds on the MI300X with HBM4 memory at 19.6 TB/s bandwidth, targeting inference in HPC and edge devices. Paired with the Vitis AI platform, it supports frameworks like PyTorch for optimized deep learning inference. The ZenDNN library boosts EPYC CPU inference, making it a cost-effective alternative to NVIDIA for enterprise suites. With 10x on-device AI gains via upcoming "Gorgon" architecture, it's strong for personal AI workstations. AMD's focus on open ecosystems positions it well for distributed inference, where open-source LLMs thrive.

5. Google Cloud TPU v6

Google's next-gen TPUs, evolving from v5p pods, are set for broader 2026 rollout with enhanced inference capabilities via custom tensor processing. Designed for low-power, high-volume traffic, they disrupt NVIDIA's monopoly with 10x efficiency for edge and cloud workloads. Integrated with Google's AI stack, they excel in parallel computing for real-time tasks like video analytics. Benchmarks show superior cost-per-inference for large-scale deployments, especially in agentic AI. As custom chips proliferate, TPUs' programmability and ecosystem support make them a versatile choice for developers avoiding vendor lock-in.

In summary, 2026 marks a transition from GPU dominance to diverse, specialized inference hardware. Trends like model-hardwiring (Taalas) and wafer-scale integration (Cerebras) challenge incumbents, while distributed edge inference gains traction. Power constraints and ROI pressures will favor efficient designs, potentially reshaping the $500B AI chip market. If you're building AI systems, keep an eye on these— the future is inference-first.

Other Notable Contenders: Microsoft Maia and Tesla AI4 & AI5

While the top 5 represent the most impactful and broadly adoptable inference solutions in 2026, several proprietary chips from major players deserve mention for their specialized innovations. Microsoft's Maia 200, announced on January 26, 2026, is a second-generation AI accelerator built specifically for inference in Azure data centers. Fabricated on TSMC's 3nm process with over 140 billion transistors, it features native FP8/FP4 tensor cores, 216GB of HBM3e memory at 7 TB/s bandwidth, and 272MB of on-chip SRAM. This delivers impressive performance: over 10 petaFLOPS at FP4 and 5 petaFLOPS at FP8, enabling it to handle large models like OpenAI's GPT-5.2 with 30% better performance per dollar than competitors. Maia 200 is already deploying in Microsoft's Iowa and Arizona facilities, powering internal workloads, synthetic data generation, and services like Microsoft 365 Copilot and Foundry. It outperforms Amazon's Trainium v3 by 3x in FP4 and Google's TPU v7 in FP8, focusing on cost efficiency rather than raw rivalry with NVIDIA.

Tesla's AI4 (current Hardware 4 for Full Self-Driving) and upcoming AI5 chips, on the other hand, are tailored for edge inference in vehicles and robotics like Optimus. AI5's design is nearly complete as of January 2026, with limited production slated for late 2026 and high-volume in 2027. It promises 10x the computing power of AI4 overall, with up to 40x speedups in specific inference steps, enabling near-perfect autonomous driving and enhanced robot capabilities. Tesla has also restarted its Dojo 3 supercomputer project, which will incorporate later chips like AI7 for data center-scale training and inference, but the focus remains on in-house, real-time edge processing without reliance on external vendors like NVIDIA.

Despite their strengths, neither made the top 5. Microsoft Maia 200 is excluded due to its proprietary nature—it's deeply integrated into Azure and not broadly available for third-party use or independent benchmarking yet. As a fresh release, it lacks the proven market adoption and ecosystem maturity of leaders like NVIDIA or Google TPUs, and its update cycle lags behind faster-iterating competitors. Tesla's AI4 and AI5 are specialized for automotive and robotic edge inference, excelling in low-power, real-time scenarios but not designed for general-purpose data center workloads like serving large LLMs. Their in-house exclusivity limits scalability and accessibility outside Tesla's ecosystem, contrasting with the top 5's focus on versatile, commercially deployable solutions.

In summary, 2026 marks a transition from GPU dominance to diverse, specialized inference hardware. Trends like model-hardwiring (Taalas) and wafer-scale integration (Cerebras) challenge incumbents, while distributed edge inference gains traction. Power constraints and ROI pressures will favor efficient designs, potentially reshaping the $500B AI chip market. If you're building AI systems, keep an eye on these— the future is inference-first.

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